The present invention relates generally to communication interface adapters and more specifically to an adapter for interfacing a line with a transmitter/receiver which has an unusual protocol.
With the advent of microelectronics, the size of interface adapters have been substantially reduced without a reduction in sophistication. The typical interface adapter may now include a microcomputer and a universal synchronous or asynchronous receiver/transmitter (US/ART). The microcomputer will include a processor and memory wherein the memory is capable of providing the necessary information to program the US/ART to interface the protocol of a device and a line. Typical examples are found in U.S. Pat. Nos. 4,007,443 and 4,093,823. The memory may include a programmable portion which is capable of being written into and read from as well as read only memories which contain particular programming instructions depending upon the device and line to be interfaced. Examples of using Read Only Memories to taylor interface adapters are shown in U.S. Pat. Nos. 3,751,582 and 4,079,452.
In general, the US/ARTs are programmed for a given bits per character for transmission and the same or different number of character bits for reception from the device. The device is controlled by logic inputs and outputs such that once it is activated it continues to transmit until the transmission or reception is finished or frame synchronization is lost. Thus the control of the device by the interface adapter is performed on a frame level. This type of control has been suitable for many situations, but has been found to be unsuitable for specific types of devices. To be more specific, devices having a frame protocol which is completely diverse from the line protocol have been impossible to interface without the use of extensive electronic components and systems. This has made the interface large and expensive as well as requiring undesirable execution time for the interface conversion. For example, a RAPICOM Model 412 or 450 digital facsimile machine has a frame consisting of 585 bits of information of which the first 24 bits are used for synchronization and 561 bits are data which must be transmitted to the line. Using a standard 5, 6, 7, or 8 bits per frame as the line protocol, it is difficult to conveniently handle the 561 bits of data without using a large number of electronic elements and storage. Thus there exists a need for an inexpensive, small and fast processing interface device to handle odd sized frame formats.